Mixed Signal ASIC Engineer

Job Description

Job Description

Introduction

Ayo is a venture-backed early-stage startup that will radically re-define how humanity performs compute for AI. Our photonic processors will provide orders of magnitude improvement in speed and power efficiency in comparison to conventional digital compute platforms by taking advantage of the natural parallelism, speed and energy efficiency of light.

We are seeking a Mixed Signal ASIC Engineer to serve as a core team member and among the first employees at Ayo. Reporting to our Lead Mixed Signal ASIC Engineer, you will play a hands-on role in designing, taping out, and testing the electronic ASICs that interface with Ayo’s photonic integrated circuits. You will work collaboratively across functions to co-design and co-package electronic ASICs with Ayo’s photonic chips, support bring-up and test, and contribute to successful demonstrations and product prototypes.

Responsibilities:

• Contribute to the architecture and specification of mixed-signal ASICs that control and interface with Ayo’s photonic integrated circuits

• Perform schematic capture, layout, and verification for mixed-signal integrated circuits with elements including digital-to-analog converters, analog-to-digital converters, transimpedance amplifiers, and transconductance amplifiers

• Execute across the full design-to-test cycle: design, manufacture, bring-up, characterization, and validation

• Support packaging and test requirements and flows for integrated circuits

• Contribute to the bring-up and test of integrated circuits

• Provide expertise and support to other Ayo team members

• Be interested, curious, and willing to take on the full scope of ASIC development

Qualifications:

• PhD in electrical engineering or equivalent industry experience

• 5+ years of experience designing, simulating, and testing analog and mixed signal integrated circuits

• Strong fundamentals in analog and mixed signal design, including ADC/DAC, amplifiers (TIA, OTA), and related circuit blocks

• Commercial tape-outs preferred; strong hands-on foundry experience required

• Proficiency with standard EDA tools such as Cadence or Synopsys

• Demonstrated ability to take a chip from design through manufacture, test, and validation

Preferred Qualifications:

• Experience collaborating with integrated photonics teams

• Experience with advanced packaging such as 2.5D / 3D integration

Contact:

Peter Russo ([email protected])