R&D Engineering, Principal Engineer - 16937

Category Engineering Hire Type Employee Job ID 16937 Base Salary Range $166000-$249000 Remote Eligible No Date Posted 05.05.2026

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent a decade or more designing analog and mixed-signal circuits that actually have to work in production, not just pass simulation. You know the feeling when a layout tweak fixes a jitter problem that three rounds of schematic changes could not touch. You have been through enough tapeouts to know where things usually go wrong, and you have debugged enough silicon to trust your gut when the measurement does not match the model.

High-bandwidth memory interfaces are your world. You understand that hitting a multi-gigabit data rate is about managing power budgets, keeping noise under control, and making a hundred small decisions that either add up to something solid or fall apart at the worst possible corner. You have learned that the best designs come from talking to the right people early, whether that is a layout engineer who sees something you missed or a customer who needs the IP to do something slightly different than the spec says.

You like helping other engineers figure things out. Walking someone through their first tricky layout or explaining why a circuit behaves differently in silicon than it did in simulation does not feel like extra work, it is just part of being on a team. You do not need someone to hand you a perfect plan. You ask the right questions, you push back when something smells off, and you move forward even when the picture is not completely clear. At Synopsys, you will work on memory and die-to-die IP that goes into some of the most advanced chips being built today, and what you design here will actually matter.

What You'll Be Doing

• Design and develop analog and mixed-signal circuits for high-bandwidth memory interfaces like HBM and emerging die-to-die standards, working in the latest process nodes
• Collaborate with engineers across the globe to figure out the best way to solve tough technical problems in 2.5D and 3D multi-chip designs
• Work directly with customers to help them integrate our IP, troubleshoot issues when things do not behave as expected, and adjust designs to fit real system needs
• Own the silicon-to-simulation correlation work for testchips, figure out why measurements and models do not always agree, and feed those lessons back into the design process
• Partner with layout teams to make sure circuits perform the way they need to, managing parasitics, matching, and all the things that matter when rubber meets road
• Mentor junior engineers on circuit design, layout best practices, debugging strategies, and how to work with customers effectively
• Build scripts and explore AI tools to automate repetitive design tasks and help the team work faster and smarter

The Impact You Will Have

• Your circuits will power the high-bandwidth memory and interconnect IP that goes into AI accelerators, data center chips, and the next wave of computing systems
• The design choices you make around performance, power, and area will directly shape how well Synopsys IP works in customer chips that ship in real products
• Your silicon correlation work will make our models more accurate and our designs more predictable, which means fewer surprises and faster time to market for the next generation of IP
• The time you spend mentoring will help grow the skills and confidence of the engineering team, making everyone better at what they do
• Your work with customers will build trust and long-term relationships that matter for both their success and ours
• The automation and AI experiments you drive will help the team handle more complexity and move faster as designs get harder
• Your technical judgment and leadership will help set the direction for how we approach analog and mixed-signal design in one of the most important IP areas at Synopsys

What You'll Need

• BS, MS, or PhD in Electrical Engineering or something closely related
• 10+ years actually designing analog, mixed-signal, memory, or custom logic circuits, with real tapeouts under your belt
• Strong layout skills and a solid understanding of how layout decisions affect circuit behavior, including parasitics, matching, noise, and reliability
• Good grasp of signal integrity and power integrity, especially in high-speed links, memory interfaces, or multi-chip systems
• Ability to work well with people across different teams, time zones, and functions, and to explain complex technical ideas in a way that makes sense
• Experience writing scripts to automate design work (Python, Tcl, Perl, or similar) is a strong plus
• Any exposure to AI-assisted design tools or workflows is a plus

Who You Are

• You can look at a schematic, a layout, and a scope trace and figure out what is really going on, not just what the simulator says should be happening
• You are the person others ask when a circuit is doing something weird and no one can figure out why
• You do not wait around for perfect information or a complete spec, you work with what you have, ask good questions, and make things move forward
• You can explain a tough design tradeoff to a customer or a new engineer without losing the technical nuance or making it sound like magic
• You care about the corner cases, the things that break at extreme PVT, and you do not let those details slide
• You genuinely like helping other people get better at what they do, and you get real satisfaction from seeing someone level up

The Team You'll Be Part Of

You will join the design team in Boxborough, Massachusetts, working on high-bandwidth memory and die-to-die interface IP. This is a global team with deep expertise across analog, mixed-signal, and high-speed design, and you will collaborate regularly with engineers, architects, and applications specialists in other Synopsys sites worldwide. The work is technical, the problems are hard, and the IP you help build will ship in some of the most advanced chips in the world.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.