Hardware Design/Verification Engineer (FPGA, UVM)
Kforce's client, a growing technology company delivering innovative communications products and services worldwide, is seeking an experienced Hardware Design/Verification Engineer (FPGA, UVM) in Marlborough, MA. In this role, the Hardware Design/Verification Engineer will work alongside a collaborative team of engineers developing the next generation of advanced communications systems. Key Responsibilities:
- Develop and maintain verification environment in SystemVerilog/UVM
- Develop UVM testbenches for verifying FPGA designs
- Write and debug test cases
- Participate in design/code reviews and manage UVM code revisions
- Own and resolve technical issues throughout the verification process
- BS or MS in Electrical Engineering, Computer Engineering, or related discipline
- 7+ years of related hardware design/verification experience
- Experience with design and implementation of FPGA modules using Verilog or VHDL
- Knowledge of UVM verification
- Strong communication and collaborations skills
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